ESP8266 Pin List 05.11.2014
1. INST_NAME indicate the IO_MUX REGISTER defined in eagle_soc.h，for example MTDI_U refers to PERIPHS_IO_MUX_MTDI_U2. NET NAME accords with the pin name in schematic
3. FUNCTION says the multifunction of each pin pad func number 1-5 in this table correspond to FUNCTION 0-4 in SDK e.g.：set MTDI to GPIO12
[1]#define FUNC_GPIO12 3 //defined in eagle_soc.h
[2]PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U,FUNC_GPIO12);
| Cell Name | Inst Name | Function1 | Type | Function2 | Type | Function3 | Type | Function4 | Type | Function5 | Type | At Reset | After Reset | Sleep |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| PDUW08DGZ | MTDI_U | MTDI | I | I2SI_DATA | I/O/T | HSPIQ MISO | I/O/T | GPIO12 | I/O/T | U0DTR | O | oe=0, wpu | wpu | oe=0 |
| PDUW08DGZ | MTCK_U | MTCK | I | I2SI_BCK | I/O/T | HSPID MOSI | I/O/T | GPIO13 | I/O/T | U0CTS | I | oe=0, wpu | wpu | oe=0 |
| PDUW08DGZ | MTMS_U | MTMS | I | I2SI_WS | I/O/T | HSPICLK | I/O/T | GPIO14 | I/O/T | U0DSR | I | oe=0, wpu | wpu | oe=0 |
| PDUW08DGZ | MTDO_U | MTDO | O/T | I2SO_BCK | I/O/T | HSPICS | I/O/T | GPIO15 | I/O/T | U0RTS | O | oe=0, wpu | wpu | oe=0 |
| PDUW08DGZ | U0RXD_U | U0RXD | I | I2SO_DATA | I/O/T | O | GPIO3 | I/O/T | CLK_XTAL | O | oe=0, wpu | wpu | oe=0 | |
| PDUW08DGZ | U0TXD_U | U0TXD | O | SPICS1 | I/O/T | O | GPIO1 | I/O/T | CLK_RTC | O | oe=0, wpu | wpu | oe=0 | |
| PDUW08DGZ | SD_CLK_U | SD_CLK | I | SPICLK | I/O/T | O | GPIO6 | I/O/T | U1CTS | I | oe=0 | oe=0 | ||
| PDUW08DGZ | SD_DATA0_U | SD_DATA0 | I/O/T | SPIQ | I/O/T | O | GPIO7 | I/O/T | U1TXD | O | oe=0 | oe=0 | ||
| PDUW08DGZ | SD_DATA1_U | SD_DATA1 | I/O/T | SPID | I/O/T | O | GPIO8 | I/O/T | U1RXD | I | oe=0 | oe=0 | ||
| PDUW08DGZ | SD_DATA2_U | SD_DATA2 | I/O/T | SPIHD | I/O/T | O | GPIO9 | I/O/T | HSPIHD | I/O/T | oe=0 | oe=0 | ||
| PDUW08DGZ | SD_DATA3_U | SD_DATA3 | I/O/T | SPIWP | I/O/T | O | GPIO10 | I/O/T | HSPIWP | I/O/T | oe=0 | oe=0 | ||
| PDUW08DGZ | SD_CMD_U | SD_CMD | I/O/T | SPICS0 | I/O/T | O | GPIO11 | I/O/T | U1RTS | O | oe=0 | oe=0 | ||
| PDUW08DGZ | GPIO0_U | GPIO0 | I/O/T | SPICS2 | I/O/T | O | I/O/T | CLK_OUT | O | oe=0, wpu | wpu | oe=0 | ||
| PDUW08DGZ | GPIO2_U | GPIO2 | I/O/T | I2SO_WS | I/O/T | U1TXD | O | I/O/T | U0TXD | O | oe=0, wpu | wpu | oe=0 | |
| PDUW08DGZ | GPIO4_U | GPIO4 | I/O/T | CLK_XTAL | O | oe=0 | oe=0 | |||||||
| PDUW08DGZ | GPIO5_U | GPIO5 | I/O/T | CLK_RTC | O | oe=0 | oe=0 | |||||||
| PDDW08DGZ | XPD_DCDC | XPD_DCDC | O | RTC_GPIO0 | I/O/T | EXT_WAKEUP | I | DEEPSLEEP | O | BT_XTAL_EN | I | oe=1,wpd | oe=1,wpd | oe=1 |
ESP8266 Pin Register 05.11.2014
| Num | Pin | Address | Bit[8] | Bit[7] | Bit[6] | Bit[5:4] | Bit[3] | Bit[2] | Bit[1] | Bit[0] | GPIO pin | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Function Select[2] | Pullup | Rsvd | Function Select[1:0] | Sleep Pullup | Rsvd | Sleep Sel | Sleep OE | |||||
| 1 | MTDI_U | 0x60000804 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO12 | |
| 2 | MTCK_U | 0x60000808 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO13 | |
| 3 | MTMS_U | 0x6000080C | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO14 | |
| 4 | MTDO_U | 0x60000810 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO15 | |
| 5 | U0RXD_U | 0x60000814 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO3 | |
| 6 | U0TXD_U | 0x60000818 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO1 | |
| 7 | SD_CLK_U | 0x6000081C | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO6 | |
| 8 | SD_DATA0_U | 0x60000820 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO7 | |
| 9 | SD_DATA1_U | 0x60000824 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO8 | |
| 10 | SD_DATA2_U | 0x60000828 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO9 | |
| 11 | SD_DATA3_U | 0x6000082C | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO10 | |
| 12 | SD_CMD_U | 0x60000830 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO11 | |
| 13 | GPIO0_U | 0x60000834 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO0 | after reset, the default is function5 to export the clock |
| 14 | GPIO2_U | 0x60000838 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO2 | after reset, the default is function5 to export U0TXD |
| 15 | GPIO4_U | 0x6000083C | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO4 | |
| 16 | GPIO5_U | 0x60000840 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | GPIO5 | |
| Bit[6] | Bit[5] | Bit[4] | Bit[3] | Bit[2] | Bit[1:0] | |||||||
| Function Select[2] | Sleep Pulldown | Rsvd | Pulldown | Rsvd | Function Select[1:0] | |||||||
| 17 | XPD_DCDC | 0x600007A0 | 0 | 0 | 0 | 0 | 0 | 0 | RTC_GPIO0 |
ESP8266 Pin Strapping 05.11.2014
| U0TXD | Strapping to chip_test_mode | 1: normal mode; 0: chip_test_mode |
| MTDO | Strapping to STRAPPING_GPIO2 for SW boot_sel [2] | |
| GPIO0 | Strapping to STRAPPING_GPIO1 for SW boot_sel [1] | |
| GPIO2 | Strapping to STRAPPING_GPIO0 for SW boot_sel [0] | |
| SD_DATA3 | Strapping to STRAPPING_GPIO[15] for SW sdio_boot_sel [2] | |
| SD_DATA2 | Strapping to STRAPPING_GPIO[14] for SW sdio_boot_sel [1] | |
| SD_DATA0 | Strapping to STRAPPING_GPIO[13] for SW sdio_boot_sel [0] | |
| Boot_sel | SD_sel != 3'b010 | SD_sel == 3'b010 |
| 7 | SDIO HighSpeed V2 IO | Uart1 Booting |
| 6 | SDIO LowSpeed V1 IO | Uart1 Booting |
| 5 | SDIO HighSpeed V1 IO | Uart1 Booting |
| 4 | SDIO LowSpeed V2 IO | Uart1 Booting |
| 3 | FLASH BOOT | |
| 2 | Jump Boot | |
| 1 | UART Boot | |
| 0 | Remapping | |
| GPIO0 | after reset, the default is function5 to export the clock | |
| GPIO2 | U0TXD signal can be output through GPIO2 pad besides U0TXD pad |