ESP8266 GPIO — описание регистров

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ESP8266 GPIO Register 05.11.2014

ESP8266 GPIO регистры
GPIO Base Address 0x60000300
GPIO RegAddr = PERIPHS_GPIO_BASEADDR+ (OFFSET*4)
NUMOFFSETRegAddrRegNameSignalBitPosSW(R/W)Description
00x00000x60000300GPIO_OUTGPIO_BT_SEL[31:16]R/WBT-Coexist Selection register
GPIO_OUT_DATA[15:0]R/WThe output value when the GPIO pin is set as output.
10x00010x60000304GPIO_OUT_W1TS[31:16]
GPIO_OUT_DATA_W1TS[15:0]WOWriting 1 into a bit in this register will set the related bit in GPIO_OUT_DATA
20x00020x60000308GPIO_OUT_W1TC[31:16]
GPIO_OUT_DATA_W1TC[15:0]WO
30x00030x6000030CGPIO_ENABLE[31:22]Writing 1 into a bit in this register will clear the related bit in GPIO_OUT_DATA
GPIO_SDIO_SEL[21:16]R/WSDIO-dis selection register
GPIO_ENABLE_DATA[15:0]R/WThe output enable register.
40x00040x60000310GPIO_ENABLE_W1TS[31:16]
GPIO_ENABLE_DATA_W1TS[15:0]WOWriting 1 into a bit in this register will set the related bit in GPIO_ENABLE_DATA
50x00050x60000314GPIO_ENABLE_W1TC[31:16]
GPIO_ENABLE_DATA_W1TC[15:0]WOWriting 1 into a bit in this register will clear the related bit in GPIO_ENABLE_DATA
60x00060x60000318GPIO_INGPIO_STRAPPING[31:16]The values of the strapping pins.
GPIO_IN_DATA[15:0]The values of the GPIO pins when the GPIO pin is set as input.
70x00070x6000031CGPIO_STATUS[31:16]
GPIO_STATUS_INTERRUPT[15:0]R/WInterrupt enable register.
80x00080x60000320GPIO_STATUS_W1TS[31:16]
GPIO_STATUS_INTERRUPT_W1TS[15:0]WOWriting 1 into a bit in this register will set the related bit in GPIO_STATUS_INTERRUPT
90x00090x60000324GPIO_STATUS_W1TC[31:16]
GPIO_STATUS_INTERRUPT_W1TC[15:0]WOWriting 1 into a bit in this register will clear the related bit in GPIO_STATUS_INTERRUPT
100x000a0x60000328GPIO_PIN0[31:11]
GPIO_PIN0_WAKEUP_ENABLE[10]R/W0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
GPIO_PIN0_INT_TYPE[9:7]R/W0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
[6:3]
GPIO_PIN0_DRIVER[2]R/W1: open drain; 0: normal
[1]
GPIO_PIN0_SOURCE[0]R/W1: sigma-delta; 0: GPIO_DATA
110x000b0x6000032CGPIO_PIN1[31:11]
GPIO_PIN1_WAKEUP_ENABLE[10]R/W0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
GPIO_PIN1_INT_TYPE[9:7]R/W0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
[6:3]
GPIO_PIN1_DRIVER[2]R/W1: open drain; 0: normal
[1]
GPIO_PIN1_SOURCE[0]R/W1: sigma-delta; 0: GPIO_DATA
120x000c0x60000330GPIO_PIN2[31:11]
GPIO_PIN2_WAKEUP_ENABLE[10]R/W0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
GPIO_PIN2_INT_TYPE[9:7]R/W0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
[6:3]
GPIO_PIN2_DRIVER[2]R/W1: open drain; 0: normal
[1]
GPIO_PIN2_SOURCE[0]R/W1: sigma-delta; 0: GPIO_DATA
130x000d0x60000334GPIO_PIN3[31:11]
GPIO_PIN3_WAKEUP_ENABLE[10]R/W0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
GPIO_PIN3_INT_TYPE[9:7]R/W0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
[6:3]
GPIO_PIN3_DRIVER[2]R/W1: open drain; 0: normal
[1]
GPIO_PIN3_SOURCE[0]R/W1: sigma-delta; 0: GPIO_DATA
140x000e0x60000338GPIO_PIN4[31:11]
GPIO_PIN4_WAKEUP_ENABLE[10]R/W0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
GPIO_PIN4_INT_TYPE[9:7]R/W0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
[6:3]
GPIO_PIN4_DRIVER[2]R/W1: open drain; 0: normal
[1]
GPIO_PIN4_SOURCE[0]R/W1: sigma-delta; 0: GPIO_DATA
150x000f0x6000033CGPIO_PIN5[31:11]
GPIO_PIN5_WAKEUP_ENABLE[10]R/W0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
GPIO_PIN5_INT_TYPE[9:7]R/W0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
[6:3]
GPIO_PIN5_DRIVER[2]R/W1: open drain; 0: normal
[1]
GPIO_PIN5_SOURCE[0]R/W1: sigma-delta; 0: GPIO_DATA
160x00100x60000340GPIO_PIN6[31:11]
GPIO_PIN6_WAKEUP_ENABLE[10]R/W0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
GPIO_PIN6_INT_TYPE[9:7]R/W0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
[6:3]
GPIO_PIN6_DRIVER[2]R/W1: open drain; 0: normal
[1]
GPIO_PIN6_SOURCE[0]R/W1: sigma-delta; 0: GPIO_DATA
170x00110x60000344GPIO_PIN7[31:11]
GPIO_PIN7_WAKEUP_ENABLE[10]R/W0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
GPIO_PIN7_INT_TYPE[9:7]R/W0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
[6:3]
GPIO_PIN7_DRIVER[2]R/W1: open drain; 0: normal
[1]
GPIO_PIN7_SOURCE[0]R/W1: sigma-delta; 0: GPIO_DATA
180x00120x60000348GPIO_PIN8[31:11]
GPIO_PIN8_WAKEUP_ENABLE[10]R/W0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
GPIO_PIN8_INT_TYPE[9:7]R/W0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
[6:3]
GPIO_PIN8_DRIVER[2]R/W1: open drain; 0: normal
[1]
GPIO_PIN8_SOURCE[0]R/W1: sigma-delta; 0: GPIO_DATA
190x00130x6000034CGPIO_PIN9[31:11]
GPIO_PIN9_WAKEUP_ENABLE[10]R/W0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
GPIO_PIN9_INT_TYPE[9:7]R/W0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
[6:3]
GPIO_PIN9_DRIVER[2]R/W1: open drain; 0: normal
[1]
GPIO_PIN9_SOURCE[0]R/W1: sigma-delta; 0: GPIO_DATA
200x00140x60000350GPIO_PIN10[31:11]
GPIO_PIN10_WAKEUP_ENABLE[10]R/W0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
GPIO_PIN10_INT_TYPE[9:7]R/W0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
[6:3]
GPIO_PIN10_DRIVER[2]R/W1: open drain; 0: normal
[1]
GPIO_PIN10_SOURCE[0]R/W1: sigma-delta; 0: GPIO_DATA
210x00150x60000354GPIO_PIN11[31:11]
GPIO_PIN11_WAKEUP_ENABLE[10]R/W0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
GPIO_PIN11_INT_TYPE[9:7]R/W0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
[6:3]
GPIO_PIN11_DRIVER[2]R/W1: open drain; 0: normal
[1]
GPIO_PIN11_SOURCE[0]R/W1: sigma-delta; 0: GPIO_DATA
220x00160x60000358GPIO_PIN12[31:11]
GPIO_PIN12_WAKEUP_ENABLE[10]R/W0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
GPIO_PIN12_INT_TYPE[9:7]R/W0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
[6:3]
GPIO_PIN12_DRIVER[2]R/W1: open drain; 0: normal
[1]
GPIO_PIN12_SOURCE[0]R/W1: sigma-delta; 0: GPIO_DATA
230x00170x6000035CGPIO_PIN13[31:11]
GPIO_PIN13_WAKEUP_ENABLE[10]R/W0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
GPIO_PIN13_INT_TYPE[9:7]R/W0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
[6:3]
GPIO_PIN13_DRIVER[2]R/W1: open drain; 0: normal
[1]
GPIO_PIN13_SOURCE[0]R/W1: sigma-delta; 0: GPIO_DATA
240x00180x60000360GPIO_PIN14[31:11]
GPIO_PIN14_WAKEUP_ENABLE[10]R/W0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
GPIO_PIN14_INT_TYPE[9:7]R/W0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
[6:3]
GPIO_PIN14_DRIVER[2]R/W1: open drain; 0: normal
[1]
GPIO_PIN14_SOURCE[0]R/W1: sigma-delta; 0: GPIO_DATA
250x00190x60000364GPIO_PIN15[31:11]
GPIO_PIN15_WAKEUP_ENABLE[10]R/W0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
GPIO_PIN15_INT_TYPE[9:7]R/W0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
[6:3]
GPIO_PIN15_DRIVER[2]R/W1: open drain; 0: normal
[1]
GPIO_PIN15_SOURCE[0]R/W1: sigma-delta; 0: GPIO_DATA
260x001a0x60000368GPIO_SIGMA_DELTA[31:17]
SIGMA_DELTA_ENABLE[16]R/W1: enable sigma-delta; 0: disable
SIGMA_DELTA_PRESCALAR[15:8]R/WClock pre-divider for sigma-delta.
SIGMA_DELTA_TARGET[7:0]R/Wtarget level of the sigma-delta. It is a signed byte.
270x001b0x6000036CGPIO_RTC_CALIB_SYNCRTC_CALIB_START[31]R/WPositvie edge of this bit will trigger the RTC-clock-calibration process.
[30:10]
RTC_PERIOD_NUM[9:0]R/WThe cycle number of RTC-clock during RTC-clock-calibration
280x001c0x60000370GPIO_RTC_CALIB_VALUERTC_CALIB_RDY[31]0: during RTC-clock-calibration; 1: RTC-clock-calibration is done
RTC_CALIB_RDY_REAL[30]0: during RTC-clock-calibration; 1: RTC-clock-calibration is done
[29:20]
RTC_CALIB_VALUE[19:0]The cycle number of clk_xtal (crystal clock) for the RTC_PERIOD_NUM cycles of RTC-clock