ESP8266 Pins list function, register, strapping

Скачать ESP8266 Pin List 05.11.2014 в формате XLSX

Скачать ESP8266 GPIO Register 05.11.2014 в формате XLS

 

Digital pins list

Pins Register

Pins Strapping

 

ESP8266 Pin List 05.11.2014

1. INST_NAME indicate the IO_MUX REGISTER defined in eagle_soc.h,for example MTDI_U refers to PERIPHS_IO_MUX_MTDI_U
2. NET NAME accords with the pin name in schematic
3. FUNCTION says the multifunction of each pin pad func number 1-5 in this table correspond to FUNCTION 0-4 in SDK e.g.:set MTDI to GPIO12
[1]#define FUNC_GPIO12 3 //defined in eagle_soc.h
[2]PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U,FUNC_GPIO12);
Cell NameInst NameFunction1TypeFunction2TypeFunction3TypeFunction4TypeFunction5TypeAt ResetAfter ResetSleep
PDUW08DGZMTDI_UMTDIII2SI_DATAI/O/THSPIQ MISOI/O/TGPIO12I/O/TU0DTROoe=0, wpuwpuoe=0
PDUW08DGZMTCK_UMTCKII2SI_BCKI/O/THSPID MOSII/O/TGPIO13I/O/TU0CTSIoe=0, wpuwpuoe=0
PDUW08DGZMTMS_UMTMSII2SI_WSI/O/THSPICLKI/O/TGPIO14I/O/TU0DSRIoe=0, wpuwpuoe=0
PDUW08DGZMTDO_UMTDOO/TI2SO_BCKI/O/THSPICSI/O/TGPIO15I/O/TU0RTSOoe=0, wpuwpuoe=0
PDUW08DGZU0RXD_UU0RXDII2SO_DATAI/O/TOGPIO3I/O/TCLK_XTALOoe=0, wpuwpuoe=0
PDUW08DGZU0TXD_UU0TXDOSPICS1I/O/TOGPIO1I/O/TCLK_RTCOoe=0, wpuwpuoe=0
PDUW08DGZSD_CLK_USD_CLKISPICLKI/O/TOGPIO6I/O/TU1CTSIoe=0oe=0
PDUW08DGZSD_DATA0_USD_DATA0I/O/TSPIQI/O/TOGPIO7I/O/TU1TXDOoe=0oe=0
PDUW08DGZSD_DATA1_USD_DATA1I/O/TSPIDI/O/TOGPIO8I/O/TU1RXDIoe=0oe=0
PDUW08DGZSD_DATA2_USD_DATA2I/O/TSPIHDI/O/TOGPIO9I/O/THSPIHDI/O/Toe=0oe=0
PDUW08DGZSD_DATA3_USD_DATA3I/O/TSPIWPI/O/TOGPIO10I/O/THSPIWPI/O/Toe=0oe=0
PDUW08DGZSD_CMD_USD_CMDI/O/TSPICS0I/O/TOGPIO11I/O/TU1RTSOoe=0oe=0
PDUW08DGZGPIO0_UGPIO0I/O/TSPICS2I/O/TOI/O/TCLK_OUTOoe=0, wpuwpuoe=0
PDUW08DGZGPIO2_UGPIO2I/O/TI2SO_WSI/O/TU1TXDOI/O/TU0TXDOoe=0, wpuwpuoe=0
PDUW08DGZGPIO4_UGPIO4I/O/TCLK_XTALOoe=0oe=0
PDUW08DGZGPIO5_UGPIO5I/O/TCLK_RTCOoe=0oe=0
PDDW08DGZXPD_DCDCXPD_DCDCORTC_GPIO0I/O/TEXT_WAKEUPIDEEPSLEEPOBT_XTAL_ENIoe=1,wpdoe=1,wpdoe=1

ESP8266 Pin Register 05.11.2014

NumPinAddressBit[8]Bit[7]Bit[6]Bit[5:4]Bit[3]Bit[2]Bit[1]Bit[0]GPIO pin 
Function Select[2]PullupRsvdFunction Select[1:0]Sleep PullupRsvdSleep SelSleep OE
1MTDI_U0x6000080401000000GPIO12
2MTCK_U0x6000080801000000GPIO13
3MTMS_U0x6000080C01000000GPIO14
4MTDO_U0x6000081001000000GPIO15
5U0RXD_U0x6000081401000000GPIO3
6U0TXD_U0x6000081801000000GPIO1
7SD_CLK_U0x6000081C00000000GPIO6
8SD_DATA0_U0x6000082000000000GPIO7
9SD_DATA1_U0x6000082400000000GPIO8
10SD_DATA2_U0x6000082800000000GPIO9
11SD_DATA3_U0x6000082C00000000GPIO10
12SD_CMD_U0x6000083000000000GPIO11
13GPIO0_U0x6000083401000000GPIO0after reset, the default is function5 to export the clock
14GPIO2_U0x6000083801000000GPIO2after reset, the default is function5 to export U0TXD
15GPIO4_U0x6000083C10000000GPIO4
16GPIO5_U0x6000084010000000GPIO5
Bit[6]Bit[5]Bit[4]Bit[3]Bit[2]Bit[1:0]
Function Select[2]Sleep PulldownRsvdPulldownRsvdFunction Select[1:0]
17XPD_DCDC0x600007A0000000RTC_GPIO0

ESP8266 Pin Strapping 05.11.2014

U0TXDStrapping to chip_test_mode1: normal mode; 0: chip_test_mode
MTDOStrapping to STRAPPING_GPIO2 for SW boot_sel [2]
GPIO0Strapping to STRAPPING_GPIO1 for SW boot_sel [1]
GPIO2Strapping to STRAPPING_GPIO0 for SW boot_sel [0]
SD_DATA3Strapping to STRAPPING_GPIO[15] for SW sdio_boot_sel [2]
SD_DATA2Strapping to STRAPPING_GPIO[14] for SW sdio_boot_sel [1]
SD_DATA0Strapping to STRAPPING_GPIO[13] for SW sdio_boot_sel [0]
Boot_selSD_sel != 3'b010SD_sel == 3'b010
7SDIO HighSpeed V2 IOUart1 Booting
6SDIO LowSpeed V1 IOUart1 Booting
5SDIO HighSpeed V1 IOUart1 Booting
4SDIO LowSpeed V2 IOUart1 Booting
3FLASH BOOT
2Jump Boot
1UART Boot
0Remapping
GPIO0after reset, the default is function5 to export the clock
GPIO2U0TXD signal can be output through GPIO2 pad besides U0TXD pad

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